From a semiconductor market perspective, all eyes are on the automotive domain. According to Gartner, as of 2023, the automotive market is now its second-largest segment, with about 14% of the demand. Only smartphones consume more. As I mused last month in “Automotive Semiconductor March Madness 2024,” those who made a bet on automotive a decade or longer ago are pretty happy these days. Still, many new entrants are hurrying toward automotive, and especially EE architectures are worth a look to understand the critical trends. Whether we are facing evolution or revolution is sometimes hotly deb ..read more

In the rapidly evolving world of technology, system-on-chip (SoC) designs have become a cornerstone for various applications, from automotive and mobile devices to data centers. These complex systems integrate multiple processors, a multi-level cache hierarchy, and various subsystems that share memory and system resources. However, this open access to shared memory and resources introduces potential security vulnerabilities in SoC designs. Recognizing the importance of security, the RISC-V architecture, which is increasingly adopted in SoCs, offers a robust solution to address these concerns ..read more

Large EDA companies are looking at huge new opportunities that reach well beyond semiconductors, combining large-scale multi-physics simulations with methodologies and tools that were developed for chips. Top EDA executives have been talking about expanding into adjacent markets for more than a decade, but the broader markets were largely closed to them. In fact, the only significant step in that space happened in the reverse direction, when Siemens bought Mentor Graphics in 2016 for $4.5 billion. Three things have changed fundamentally since then: More leading-edge designs are domain-specifi ..read more

Despite their widespread popularity, large language models (LLMs) have several well-known design issues, the most notorious being hallucinations, in which an LLM tries to pass off its statistics-based concoctions as real-world facts. Hallucinations are examples of a fundamental, underlying issue with LLMs. The inner workings of LLMs, as well as other deep neural nets (DNNs), are only partly known, which means for end-users and designers they are essentially black boxes. The basic structure is an input, an output, and between them a series of interactions that are not fully understood. As the s ..read more

In an era when power has become a fundamental design constraint, questions persist about whether asynchronous logic has a role to play. It is a design style said to have significant benefits and yet has never resulted in more than a few experiments. Synchronous design utilizes a clock, where the clock frequency is set by the longest and slowest path in the design. That includes potential variation that can happen in the manufacturing process. A common practice during test is to separate out chips based on performance into different bins. Otherwise, all chips that do not operate above a defined ..read more

The 61st Design Automation Conference is just two months away and as I get closer to retirement, I know there will only be a few remaining for me. I entered the EDA industry in 1980, so have been involved with it for almost 45 years. Over that period, I have only missed a few. It is interesting how the conference has changed over the years. In the early days, DAC was only a conference, where like-minded people came together to share ideas and to prevent duplicate efforts. It really took off in the early ’80s when EDA companies started to pop up everywhere. I was involved in a little English co ..read more

As the industry marches forward in a 3D-IC centric design approach (figure 1), we are facing a new problem. Sometimes referred to as “electro-thermal” or “electro-thermo-mechanical,” it really is the confluence of multiple forms of physics exerting impacts on both the physical manufacture and structure of these multi-die designs and their electrical behavior. Fig. 1: Illustration of a 3D-IC assembly. What are 3D-IC multiphysics effects Put simply, we know that changes in temperatures impact electrical behavior of both wires and transistor-level devices. Similarly, mechanical stresses can also ..read more

Why is it still so hard to ensure good quality sign-off happens without leaving behind bugs in silicon? The answer, according to my colleagues at DVCon, is highly nuanced. The industry has been improving overall, as has the complexity of designs. For ASICs, 74% of the designs surveyed in the recent Wilson Research Group/Siemens EDA report have one or more processor cores, 52% have two or more cores, and 15% have eight or more processor cores—something we see more of in our experience of deploying formal verification. What was remarkable was that 32% of the ASICs had AI cores while 30% had RISC ..read more

The semiconductor industry has relied on finFETs, three-dimensional field-effect transistors with thin vertical fins, for many generations of technology. However, the industry is reaching the limits of how much finFETs can be shrunk while maintaining their speed and power benefits, which are crucial for artificial intelligence (AI) and machine learning (ML) applications. The solution is the gate-all-around (GAA) transistor architecture, which extends device scaling, boosts chip performance, and reduces power consumption. GAA devices are currently dominant at 2nm, with high-performance mobile l ..read more

By 2030, 6G is expected to be commercially available, revolutionizing connectivity with lightning-fast speeds, unprecedented bandwidths, and ultra-low latencies. It will transform various sectors, including telecommunications, manufacturing, healthcare, transportation, and entertainment. In this article, get a glimpse of the 6G world coming to us over the next decade, and explore the 6G research initiatives that are enabling these next-generation capabilities. What are the anticipated use cases and applications driving 6G research? In its International Mobile Telecommunications 2030  ..read more