Microcontrollers are becoming a key platform for processing machine learning at the edge due to two significant changes. First, they now can include multiple cores, including some for high performance and others for low power, as well as other specialized processing elements such as neural network accelerators. Second, machine learning algorithms have been pruned to the point where inferencing no longer requires massive compute power and memory. Steve Tateosian, senior vice president for Infineon’s IoT, Compute & Wireless Business Unit, examines the resources available in today’s MCUs, inc ..read more

In most chip designs, the power and ground nets are likely your largest and most important nets. If any devices are not properly connected, then you cannot expect them to function as expected. Amongst the many problems that can occur to power and ground involves the connections to the well areas of your design that power all the bulk connections to your devices. Well regions connectivity is often ignored until later in the design cycle, but by then, other design connections may obscure power and ground net connectivity errors. The most common way to check these connections is as an ERC (electr ..read more

Chip design projects are notorious for generating huge amounts of design data. The design process calls for a dozen or more electronic design automation (EDA) software tools to be run in sequence. Together, they write out hundreds of gigabytes of intermediate data on the way to creating a final layout for manufacturing. Traditionally, this has been seen as a problem. But this richness of data is now increasingly seen as a great opportunity for applying AI/ML (artificial intelligence/machine learning) techniques and launch EDA on its next great leap forward in productivity. Indeed, all major ED ..read more

A technical paper titled “Comparative Analysis of Thermal Properties in Molybdenum Substrate to Silicon and Glass for a System-on-Foil Integration” was published by researchers at Rochester Institute of Technology and Lux Semiconductors. Abstract: “Advanced electronics technology is moving towards smaller footprints and higher computational power. In order to achieve this, advanced packaging techniques are currently being considered, including organic, glass, and semiconductor-based substrates that allow for 2.5D or 3D integration of chips and devices. Metal-core substrates are a new alternati ..read more

A technical paper titled “NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors” was published by researchers at Carnegie Mellon University. Abstract: “Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding compute demands of AI workloads. Recent neuroscience theory on intelligence suggests that Cortical Columns (CCs) are the fundamental compute units in the neocortex and intelligence arises from CC’s ability to store, predict and infer i ..read more

JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it’s not possible to choose the best chiplet for a particular application or workload. The guidelines are a prerequisite for a multi-vendor chiplet marketplace. AMD, Broadcom, Cisco, Google, HPE, Intel, Meta, and Microsoft proposed a new high-speed, low-latency interconnect specification, Ultra Accelerat ..read more

In the age where data reigns supreme, the semiconductor industry stands on the cusp of revolutionary change, redefining complexity and productivity through a lens crafted by artificial intelligence (AI). The intersection of AI and the semiconductor industry is not merely an emerging trend—it is the fulcrum upon which the next generation of technological innovation balances. Semiconductor companies are facing a critical juncture where the burgeoning complexity of chip designs is outpacing the growth of skilled human resources. This is where the infusion of AI-powered data analytics catalyzes a ..read more

In a world where communication is paramount, access to reliable networks is not just a luxury but a necessity. Traditionally, satellite communications have been reserved for specialized terminals with cumbersome antennas and costly subscription plans. However, with the advent of 5G Non-Terrestrial Networks (NTNs), the landscape of satellite phone availability is undergoing a revolutionary transformation. Soon, satellite service will be accessible to billions of mobile phone subscribers worldwide, ushering in a new era of connectivity. 5G NTN technology overview 5G NTN, introduced as part ..read more

Verification complexity is roughly the square of design complexity, but until recently verification success rates have remained fairly consistent. That’s beginning to change. There are troubling signs that verification is collapsing under the load. The first-time success rate fell (see figure 1) in the last survey conducted by Wilson Research, on behalf of Siemens EDA, in 2022. A new survey is planned for early next year, but the industry is not hopeful the numbers will improve, or that these surveys are capturing the whole problem. Fig. 1: Number of spins before production. Source: Siemens E ..read more

Panels can often become love fests. While a title may sound controversial, it turns out that everyone quickly finds that all the panelists agree on the major points. This is sometimes the result of how the panel was put together – the proposal came from one company, and they wanted to get their customers or clients onto the panel. They are unlikely to ask a major competitor to be part of the event. These panels can become livelier if they have a moderator who opens up a panel to audience questions and they decide to throw the spanner in the works. This tends to happen a lot more in the technic ..read more