Silvaco Announces Launch of Initial Public Offering
AnySilicon
by anysilicon
9h ago
Santa Clara, CA – April 30, 2024 — Silvaco Group, Inc. (“Silvaco”), a provider of TCAD, EDA software, and SIP solutions that enable semiconductor design and AI through software and innovation, today announced it has launched the roadshow for its initial public offering (“IPO”) of 6,000,000 shares of its common stock. The underwriters will have a 30-day option to purchase up to an additional 900,000 shares of Silvaco’s common stock from Silvaco at the IPO price, less underwriting discounts and commissions. The IPO price is currently estimated to be between $17 and $19 per share. Silvaco’s ..read more
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CEO Talk: Mayank Varshney, VP of Engineering, Mirafra Inc
AnySilicon
by anysilicon
1w ago
This interview was held with Mayank Varshney, VP of Engineering, Mirafra Inc.     Please share with us a bird’s eye view about Mirafra Software Technologies?   Mirafra Software Technologies is possibly the largest Standalone Design Services company from India. Mirafra started couple of decades ago with a vision of providing Premium Design Services for Indian Semiconductor Ecosystem with 50% of our Engineers in the first few years hired from the prestigious IIT (Indian Institutes of Technology) background.   Even today, our founders Alok Kuchlous and Shyam Padala passionate ..read more
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IC Package Types and How to Choose One?
AnySilicon
by anysilicon
2w ago
Introduction to Integrated Circuit Packaging   Integrated circuit packaging technologies have evolved throughout the years to the point where hundreds of IC package types are available today.    Most applications will require the more general, single-element packaging for integrated circuits and the other components such as resistors, capacitators, antenna etc. However, as the semiconductor industry develops smaller and more powerful devices, a ‘system in package’ (SiP) type of solution is becoming the preferred choice, where all elements are placed into a single package or modu ..read more
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CEO Talk: Bram De Muer of ICsense
AnySilicon
by anysilicon
3w ago
This interview was held with Bram De Muer, CEO of ICsense       Tell me a bit about your background? How did you first get started with ICsense?   I am a microelectronics engineer by education. Engineering has always been in my blood, whether it was constructing novel Lego creations or dissecting old electronic equipment. The high level of abstraction in microelectronics fascinated me—the fact that incredibly complex signal processing and computation occur within a tiny piece of silicon that appears to be doing nothing at all.   This curiosity led me to pursue a PhD a ..read more
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Multi Project Wafer (MPW) Service and Price
AnySilicon
by anysilicon
1M ago
We wrote before about multi project wafer benefits for IC designers of using MPW multi-project-wafer service.   Multi Project Wafer service is allowing companies to share the expensive mask cost.  Essentially, Multi project wafer (MPW) services integrate onto silicon wafers several different integrated circuit designs from various teams. These designs are typically from companies, researchers and IP vendors that want to test their design at a lower cost.   As Maskset costs are extremely high (and only increasing), it makes sense to share mask and wafer resources to produce desig ..read more
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VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
AnySilicon
by anysilicon
1M ago
Shanghai, China, March 28, 2024 — VeriSilicon (688521.SH) today announced its complete Bluetooth Low Energy (BLE) IP solution has achieved full compliance with LE Audio specification, including certifications for the LE Audio protocol stack and Low Complexity Communications Codec (LC3). This solution is applicable to mobile phones, Bluetooth earphones including True Wireless Stereo (TWS) earphones, speakers, and other extensive audio application scenarios. The declaration details can be accessed on Bluetooth SIG’s website by searching for its Qualified Design ID (QDID: 206187).   LE ..read more
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What does a VLSI Engineer do?
AnySilicon
by anysilicon
1M ago
Like architects shaping skylines, VLSI engineers are the masterminds behind the intricate circuits that power modern electronics. In the world of microelectronics, they play a pivotal role, crafting the very foundation upon which today’s technology thrives.   Core Responsibilities in Chip Creation: VLSI engineers are tasked with developing and refining circuit designs, translating conceptual frameworks into physical, functioning silicon entities. At the heart of their work lies VLSI (Very Large Scale Integration) design, where they meticulously architect complex integrated circuits tailor ..read more
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What is an ASIC Engineer?
AnySilicon
by anysilicon
1M ago
Like a master tailor crafting a bespoke suit, an ASIC engineer designs circuits tailored for specific applications with precision and expertise.     Analogous to architects who shape skylines, ASIC design engineers sculpt the electronic landscape by creating custom integrated circuits – the foundation upon which today’s technology stands.   Unveiling the ASIC Engineer’s World     An ASIC Engineer embodies the confluence of innovative vision and meticulous engineering. In their realm, these specialized professionals harness a myriad of skills, tools, and technologies to ..read more
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ASIC Design: From Spec to Chips
AnySilicon
by anysilicon
1M ago
An Application Specific Integrated Circuit (ASIC) is a specialized integrated circuit crafted for a particular use or purpose. Typically, ASICs are tailored for products targeted for mass production, consolidating necessary electronics onto a single chip.     ASIC stands for “Application Specific Integrated Circuit.”   Despite the substantial initial design cost (known as NRE), ASICs can prove cost-effective for high-volume applications. This is especially true when a significant portion of a system can be integrated into a single ASIC, reducing the need for external components ..read more
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Understanding CoWoS Packaging Technology
AnySilicon
by anysilicon
1M ago
In order to cater to the computing demands for high performance computing (HPC) and artificial intelligence (AI), a need for a scalable package was felt. Chip-on-wafer-on-substrate (CoWoS) refers to the advanced packaging technology that offers the advantage of a larger package size and more I/O connections. It allows 2.5D and 3D stacking of components to enable homogenous and heterogenous integration. Previous systems faced memory limitations and contemporary data centers employ the use of high bandwidth memory (HBM) to enhance memory capacity and the bandwidth. CoWoS technology allows hetero ..read more
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