Merging Power and Arithmetic Optimization Via Datapath Rewriting (Intel, Imperial College London)
Semiconductor Engineering
by Technical Paper Link
6h ago
A new technical paper titled “Combining Power and Arithmetic Optimization via Datapath Rewriting” was published by researchers at Intel Corporation and Imperial College London. Abstract: “Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are therefore a common target for power optimization. While arithmetic circuit area and dynamic power consumption are often correlated, there is also a tradeoff to consider, as additional gates can be added to explicitly reduce arithmetic cir ..read more
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Chip Industry Week In Review
Semiconductor Engineering
by The SE Staff
19h ago
SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at the base of the HBM stack. Intel assembled the industry’s first high-NA EUV lithography system. “Compared to 0.33NA EUV, high-NA EUV (or 0.55NA EUV) can deliver higher imaging contrast for similar fea ..read more
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Electromigration Concerns Grow In Advanced Packages
Semiconductor Engineering
by Laura Peters
2d ago
The incessant demand for more speed in chips requires forcing more energy through ever-smaller devices, increasing current density and threatening long-term chip reliability. While this problem is well understood, it’s becoming more difficult to contain in leading-edge designs. Of particular concern is electromigration, which is becoming more troublesome in advanced packages with multiple chiplets, where various bonding and interconnect schemes create abrupt changes in materials and geometries. For example, electrons may travel from a copper trace to a solder bump of SAC (tin-silver-copper), t ..read more
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Powering The Automotive Revolution: Advanced Packaging For Next-Generation Vehicle Computing
Semiconductor Engineering
by Prasad Dhond
2d ago
Automotive processors are rapidly adopting advanced process nodes. NXP announced the development of 5 nm automotive processors in 2020 [1], Mobileye announced EyeQ Ultra using 5 nm technology during CES 2022 [2], and TSMC announced its “Auto Early” 3 nm processes in 2023 [3]. In the past, the automotive industry was slow to adopt the latest semiconductor technologies due to reliability concerns and lack of a compelling need. Not anymore. The use of advanced processes necessitates the use of advanced packaging as seen in high performance computing (HPC) and mobile applications because [4][5 ..read more
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Enabling New Applications With SiC IGBT And GaN HEMT For Power Module Design
Semiconductor Engineering
by Shela Aboud
2d ago
The need to mitigate climate change is driving a need to electrify our infrastructure, vehicles, and appliances, which can then be charged and powered by renewable energy sources. The most visible and impactful electrification is now under way for electric vehicles (EVs). Beyond the transition to electric engines, several new features and technologies are driving the electrification of vehicles. The number of sensors in a vehicle is skyrocketing, driven by autonomous driving and other safety features, while a modern software-defined vehicle (SDV) is electrifying everything from air-conditioned ..read more
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Exploring Process Scenarios To Improve DRAM Device Performance
Semiconductor Engineering
by Yu De Chen
2d ago
In the world of advanced semiconductor fabrication, creating precise device profiles (edge shapes) is an important step in achieving targeted on-chip electrical performance. For example, saddle fin profiles in a DRAM memory device must be precisely fabricated during process development in order to avoid memory performance issues. Saddle fins were introduced in DRAM devices to increase channel length, prevent short channel effects, and increase data retention times. Critical process equipment settings like etch selectivity, or the gas ratio of the etch process, can significantly impact the shap ..read more
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Advanced Packaging Design For Heterogeneous Integration
Semiconductor Engineering
by CP Hung
2d ago
As device scaling slows down, a key system functional integration technology is emerging: heterogeneous integration (HI). It leverages advanced packaging technology to achieve higher functional density and lower cost per function. With the continuous development of major semiconductor applications such as AI HPC, edge AI and autonomous electrical vehicles, traditional chips are transforming into smaller, well-partitioned chiplets that require chip-to-chip interconnections to be denser, faster and more reliable. This boosts the demand for heterogeneous integration, elevating demand fo ..read more
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EBeam Initiative Marks Major Milestones Over 15 Years Of Photomasks And Lithography
Semiconductor Engineering
by Jan Willis
2d ago
The eBeam initiative celebrated its 15th anniversary at the recent SPIE Advanced Lithography + Patterning Conference. 130 members of the mask and lithography community attended the annual lunch to mark the milestone. The eBeam Initiative welcomed its 53rd member, FUJIFILM Corporation, having grown from 20 members and advisors at its launch. FUJIFILM is the first company from the chemical supply chain and recognizes the defacto role resist plays to the eBeam community. Two of our founding members, Matthias Slodowski from Vistec Electron Beam and Aki Fujimura from D2S and co-founder of the eBeam ..read more
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Vast Universe Of Transistors, Worm-Bot Innovation, Glass-Based Processor Enhancement, And Atomically Efficient Chips
Semiconductor Engineering
by Margaret Kindling
2d ago
What’s a sextillion? It’s the number one followed by 21 zeros — outnumbering the stars in the Milky Way. Industry analyst Jim Handy estimates that 13 sextillion transistors have been manufactured by the chip industry since the first one sprang to life in late 1947. Today, as modern graphics and artificial intelligence chips each contain billions of transistors, and the total continues to build at an astronomical rate. Inspired by nature! After studying how earthworms navigate their environments, a team of engineers at GE Aerospace Research Robotics, with funding from&n ..read more
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RF General-Purpose Photonic Processor
Semiconductor Engineering
by Technical Paper Link
2d ago
A new technical paper titled “General-purpose programmable photonic processor for advanced radiofrequency applications” was published by researchers at Universitat Politècnica de València and iPronics. Abstract “A general-purpose photonic processor can be built integrating a silicon photonic programmable core in a technology stack comprising an electronic monitoring and controlling layer and a software layer for resource control and programming. This processor can leverage the unique properties of photonics in terms of ultra-high bandwidth, high-speed operation, and low power consumption while ..read more
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