I don't have any idea on this one, let me describe the symptoms.  I have two firmware projects I've tried on the CMOD A7.  One uses the "Getting Started" project with a Microblaze processor and the uartlite IP.  Its just been modified to repeatedly printf "DCBA"  in an endless loop at 9600 baud.   The other piece of firmware is some Verilog I wrote to transmit "DCBA" at 4MBaud.  I confirmed it generates correct waveforms on my scope. Host OS: Ubuntu 22.04 What I see is that on the receiving end(Linux), data gets dropped even at 9600 baud.  I get correctl ..read more

Greetings everyone, I am very new in FPGA. I plan to use Zedboard to finish my project. Before I purchase the board, I hope I can get my concerns answered here directly. The project requires the FPGA to record data from 8 ADC channels with LVDS. The FPGA needs to provide two kinds of clocks to the ADC board and meanwhile provide some SPI controls to the ADC board. After some calculations, FPGA needs to receive 10 pairs of 2.5 V LVDS signals, and provide 1 pair of 100 or 110 MHz 2.5 V LVDS signal as clk (the duty cycle will be low, so the ADCs are not fully used to lower the throughput). At the ..read more

Hi @artvvb. I hope you are doing fine. I recently started working with RTC module. I successfully read its values through Arduino. Now I want to read its values by making its connection with zedboard. I have made its connection with PMOD A and written it's desired constraint file according to pin assigning. I am confused how to observe it's values like would it be done by help of building a block design by including ILA or a verilog code.  I will be grateful if you help me with this. Thank you.  ..read more

Hello all, I am trying use the Zybo 7020 as a peripheral (slave) to communicate with an external master. I am pretty new to Vivado and Vitis and am having quite a few problems. I am trying to use the "xspips" library in Vitis that Xilinx provides and haven't been able to get it working as I don't know where/how to interact with the pins on the Zybo board. I have tried to connect the SPI0 signals in the block diagram to one of the pmod ports on the board, but it doesn't seem to be possible to do so. If someone could give a tutorial on connecting signals to MIO header pins / ports on the board t ..read more

Hello, I am trying to get the Single-ended analog inputs working (CK_A0...) with the XADC, but can only find examples using the differential inputs. This example looks to use the differential inputs (which i can get running and it works work fine for me) https://github.com/Digilent/Arty-Z7-20-xadc/tree/master but when i attempt to connect the pins that are used for CK_A0 ect... i get a warning about having mixed voltages on the bank   [Place 30-372] Bank 35 has terminals with incompatible standards: Incompatible Pair of IO Standards: (IN of IO Standard LVCMOS33) & (IN of IO St ..read more

Hi, I am trying to design an ethernet controller for my Genesys 2. From specifications (RGMII, Realtek RTL8211E-VL PHY) or other projects (special thanks to @zygot and his Ethernet PHY Test Tool project), I have successfully implemented the Tx transmitter part: I can now see the different packets with WireShark. However, I am now facing a problem in the Rx receiver part. After analyzing the signals, I've noticed that the issue seems to come from the signals that are received from the PHY. Below is a screenshot of a received packet observed from an ILA: the sampling clock is at 500MHz (so the w ..read more

I have trying  to interface PMOD AD1 to CoraZ7 , board but im facing issue with genarating bitstream , ERROR  Implementation Write Bitstream DRC Pin Planning [DRC NSTD-1] Unspecified I/O Standard: 8 out of 138 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This ..read more

Hello, I bought a Basys 3 two months ago, the problem is the basys is not turning on, yesterday it was ok, I tried everything, I changed the USB Port with I was working, I connected it directly to the light and nothing ..read more

I have ordered 4 ARTY-Z7-20 boards in the last few years.  I bought 2 a month ago (Rev D), and 2 several years ago (Rev B). There seem to be some build quality issues, or perhaps someone can explain why out of *Four Arty-Z7 boards*, *NONE* of them work completely.  They fail in 3 different ways:  OTP memory doesn't work, ethernet PHY doesn't work, or the ARM program will not launch at all. I developed a simple telnet interface running on the ARM (from a simple TCP echo example), utilizing lwip library and the RJ45 network connection.  It echoes a few commands and gets some ..read more

I want to get a USB hub because my laptop doesn't have enough USB ports. I'll connect a keyboard, mouse, a USB cable for UART communication, and another cable for programming the FPGA. So let's say I connect 4 USB cables. What concerns me is that ultimately these 4 USB inputs are connected to the same USB port at the final. In this case, would it be possible to both program the FPGA and communicate via UART through the same USB port? and at the same i will be using keyobard, mouse I hope I've explained it clearly. As far as I've researched on the internet, a USB hub should be of high quality ..read more