How to implement mosfet with large width
EDAboard
by nithinp
5h ago
I'm doing a project on LDO , I was calculating the W/L ratio of pass transistor(PMOS) which turned out to be approx 8600, so I put W=4300u, L=0.5u. I'll absolutely get an error bcs the width exceeds the max width given by the foundry, How can I overcome this problem ..read more
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How to implement mosfet with large length
EDAboard
by nithinp
5h ago
I'm doing a project on LDO , I was calculating the W/L ratio of pass transistor(PMOS) which turned out to be approx 8600, so I put W=4300u, L=0.5u. I'll absolutely get an error bcs the width exceeds the max width given by the foundry, How can I overcome this problem ..read more
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DRC errors
EDAboard
by omar97
10h ago
Hello everyone, I have nearly 400000 DRC errors on VIA7. I am using technology TSMC 65nm with runset M9_6X2Z actually, i can't understand why this errors appeared for me. Can someone help me to understand why this errors appered? this is a complete description of this error: 0: Layer: VIA7 (57) Type: USER_GUIDE.VIA7 Net type: Ground; Route type: Std Cell Pin Connection Type Summary : USER_GUIDE.VIA7 : Via layers with forbidden datatypes. -- Command... Read more ..read more
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How to calculate Propagation Delay in Domino CMOS circuits.
EDAboard
by Manjunath557
10h ago
I want to compare Propagation delays of Static CMOS vs Domino CMOS circuit. As in the domino circuits fall time does not exist as the output falls before due to precharge phase. What will be the delay Formula ? (Rise time + 0)/2 or Delay = Rise time ..read more
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Recreating impedance in CST simulator
EDAboard
by yefj
12h ago
Hello , I am trying to recreate the impedance of a unit cell of the table shown below from the attached link using CST. I have shown a step by step of how i tried to extract the impedanceof the cell. Is there someone who done it before and could help me understand teh proccess? https://arxiv.org/pdf/2302.07313.pdf Thanks ..read more
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How to calculate signal rise time from frequency
EDAboard
by newbie_hs
18h ago
Dear Team, May I know how to calculate a signals rise time from it's frequency. I found this article for the same. The formula given is Tr = 1/f*π. May I know is this applicable for PWM also ..read more
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Internal RC oscillator for reliable USART
EDAboard
by valdorf
18h ago
I want to use microcontroller - STM32C011F6P3TR. As mentioned in datasheet, it has internal 48 MHz RC oscillator (±1 % accuracy).Can I use this microcontroller without using external crystal for USART communication at baudrates up to 57600?I want to reduce number of external parts to save space and price ..read more
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Merging step files
EDAboard
by engr_joni_ee
19h ago
I have two step files. These two step files belong to half part of one electronic component for printed circuit boards. I need to put them together in the same file. Can I use Fusion 360. Is that possible to add/import the step files in to Fusion 360 and merge them and export as a single step file ? I guess some basic things can be done in Fusion 360 without any setting up purchased license, right ..read more
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Sample and hold spectral response?
EDAboard
by TicTek
19h ago
Hi guys, Can anyone help me how the author used convolution to get from equation 2.8 to equation 2.9 ..read more
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How to resolve adc sampling rate for the system
EDAboard
by curious_mind
21h ago
I have a control system modeled in matlab, which takes the inputs from ADC and then continues to process the data. Simulation works fine. In real world,I am not sure how to fix the sampling rate. ADC is a simultaneous sampling type (AD7606) and the fixed point algorithm runs in FPGA. I am using bunch of discrete integrator which requires the sampling time as a parameter. If I fix 10k as a sampling rate, I will never be able to get simultaneous data from ADC at this rate as the ADC requires... Read more ..read more
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