Hardware-Accelerated Kernel-Space Memory Compression Using Intel QAT
IEEE Computer Architecture Letters
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Cost-Effective Extension of DRAM-PIM for Group-Wise LLM Quantization
IEEE Computer Architecture Letters
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1w ago
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Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference
IEEE Computer Architecture Letters
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Comprehensive Design Space Exploration for Graph Neural Network Aggregation on GPUs
IEEE Computer Architecture Letters
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RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models
IEEE Computer Architecture Letters
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3w ago
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Accelerating Page Migrations in Operating Systems With Intel DSA
IEEE Computer Architecture Letters
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GPU-Centric Memory Tiering for LLM Serving With NVIDIA Grace Hopper Superchip
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Cooperative Memory Deduplication With Intel Data Streaming Accelerator
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Editorial: A Letter From the Editor-in-Chief of IEEE Computer Architecture Letters
IEEE Computer Architecture Letters
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1M ago
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SPAM: Streamlined Prefetcher-Aware Multi-Threaded Cache Covert-Channel Attack
IEEE Computer Architecture Letters
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1M ago
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