Everything to Know about SoC Development
eInfochips - Semiconductor
by Pooja Kanwar
3M ago
According to Mordor Intelligence, the SoC is calculated at USD 159.85 billion in 2023, and it is anticipated to reach USD 234.98 billion by 2028, increasing at a CAGR of 8.01% during the forecast period (2023-2028). System-on-a-chip (SOC) was only a catchphrase a few decades back. It is a necessary technology nowadays that keeps the electronics industry moving forward. Smaller, less expensive, quicker, and lower power-consuming computational devices are made possible by the growing trend of more integration and embedded computing, which is reflected in the rise in SoCs. Smartphones, tablets ..read more
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FAQs on Physical Design, DFT-DFM And Verification Methodologies
eInfochips - Semiconductor
by eInfochips PES
3M ago
1. What is physical design? In VLSI, physical design (is also known as integrated circuit layout) is a process in which the front end design transfer the structural netlist to the back end design team to convert into a physical layout database which consists of geometrical design information for all the physical layers which is used for interconnections. 2. What is DRC? DRC is a process where the entire physical design database is checked against design rules. The design layout must adhere to the standards defined by the foundry for manufacturability. DRC was introduced as the lower geo ..read more
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Q&A on ASIC-FPGA-SoC Design and Solutions
eInfochips - Semiconductor
by eInfochips PES
3M ago
Placement blockages Cell padding Macro padding Maximum Utilization constraints \nRead more about these techniques in detail, here."}},{"@type":"Question","name":"What is STA in ASIC design flow?","acceptedAnswer":{"@type":"Answer","text":"STA (Static Timing Analyzer) in ASIC design flow is a simulation process of computing the unexpected maximum and minimum timing delays in your design. The timing analysis checks are done by using timing analysis tools (Synopsys Primetime, tempus) in the integrated circuits.\n\n \n Performing STA at two stage \n Pre layout STA \n Post layout STA \n P ..read more
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What it means to be an ARM Approved Design Partner
eInfochips - Semiconductor
by Mihir Shah
3M ago
Whether you’re a large-scale semiconductor company with billion-gate design capability or a small SoC start-up, it’s not difficult to see that embedded and IoT applications are playing/will play a greater role in your revenue realization. To keep pace with the evolving demands of this lucrative market, your company should be able to develop feature-rich computing devices that have high performance, long battery life, smaller geometry and RISC-based high performance processor cores. What this means is gaining access to a trustworthy eco-system that can provide quick and easy reference to evolv ..read more
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Top 10 Contributing Factors to Design-for-Manufacturability (DFM)
eInfochips - Semiconductor
by Nitesh Pandita
3M ago
Manufacturing is one of the key factors which determines product success, as it directly refers to product quality and availability. Design for Manufacturability (DFM) determines the process of ensuring optimum production efficiency and quality while taking care of potential product problems in the design phase itself. DFM saves on time; cost and effort related to product redesigning process and carves out best-manufacturing output efficiently. It takes care of factors which might impact product manufacturing including the nature of raw material, its physical and chemical attributes and its a ..read more
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ASIC Prototyping and ASIC VS FPGA Which One to Consider?
eInfochips - Semiconductor
by Pooja Kanwar
8M ago
For those who do not know what ASIC prototyping is (also known as FPGA prototyping or ASIC emulation), it entails translating all or parts of an ASIC design onto an FPGA to test the device’s functioning. Targeting aspects that are either crucial or unavailable to be confirmed through simulation makes this procedure particularly intriguing. The FPGA is often surrounded by peripherals, memory, and connections, allowing designers to test and debug while also letting it communicate with the outside world. ASIC prototype boards can be obtained in one of the two ways: by building one yourself or by ..read more
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An Ultimate Guide: ASIC Design and Development Services
eInfochips - Semiconductor
by Pooja Kanwar
8M ago
Globally, engineering teams have been working cooperatively toward making futuristic advanced technologies in minute-sized ASIC (Application Specific Integrated Circuit). This exciting race is full of challenges of finding compact, faster, and more efficient Integrated Circuit (IC) designs to construct future technologies. In a report published in Grand View Research, the size of the worldwide Application-Specific Integrated Circuit (ASIC) market was assessed at USD 15.99 billion in 2022, and from 2023 to 2030, it is anticipated to expand at a CAGR of 5.9%. Application-Specific Integrated Circ ..read more
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Transforming Solutions for Smart Buildings and Connected Devices Using latest EIC-i.MX93-210 platform
eInfochips - Semiconductor
by Chintan Raval
8M ago
What is EIC-i.MX93-210? EIC-i.MX93-210 is a robust platform powered by NXP Semiconductors’ strong and adaptable i.MX93 application processor. The processor has a scalable Arm EthosTM-U65 microNPU Core for efficient machine learning acceleration, as well as enhanced security features such as an embedded EdgeLock secure enclave to facilitate edge computing. The Reference Development Platform (RDP) lets developers build high-performance, low-cost, and energy-efficient machine-learning systems. Here, we will see that leveraging eInfochips’ newly developed EIC-i.MX93-210 platform helps us in transf ..read more
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Semiconductor Companies Turn to AI to Design Future Chips
eInfochips - Semiconductor
by Pooja Kanwar
9M ago
Chip designers now have a whole new set of difficulties to research and solve. Artificial intelligence (AI) is being used by semiconductor and systems firms to improve chip design, shorten time to market, and reduce costs. The top semiconductor businesses in the world will spend $300 million on internal and external AI tools for developing chips in 2023, according to Deloitte Global, and that amount will increase by 20% yearly over the next four years to reach $500 million in 2026. AI Has the Potential to Revolutionize Advanced Semiconductor Design The need for next-generation processors is gr ..read more
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TI Keystone Lamar (K2L) and the Bounty of Application Areas
eInfochips - Semiconductor
by Nitesh Pandita
9M ago
In my last blog on TI K2E, I had briefed about Texas Instruments (TI) Keystone Edison (K2E). Here in this edition of blog, I would like to describe another latest incredible TI processor called Keystone Lamar (K2L). K2L is a multicore processor based on latest Keystone II architecture with up to two 1.2 GHz ARM Cortex-A15 cores and up to four 1/1.2GHz TMS320C66x DSP cores.  It is the first processor with JESD204B interface with integrated sample rate conversation (DDUC) which makes it an ideal fit to replace FPGAs as it can be directly connected to TI ADC/DAC and AFE. Thus K2L helps in re ..read more
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