Hello, You might want to take a look at the block design script for the daq2 project . The ad9144 is implemented using our JESD204 Interface Framework . Specifically, the DDS is implemented inside the DAC JESD204B/C Transport Peripheral . You'll probably also want to look at the dds code and its documentation ..read more

Is the source code for the AXI_ADI_9144 core, or enough details to replicate the DDS data path available? I want to update the DDS frequency tuning word and output amplitude from a look up table in just one clock cycle for fast frequency hopping application. Thanks ..read more

Glad to hear that it worked! [quote userid="119913" url="~/fpga/f/q-a/585206/fmcdaq2-ebz-kc705-iio-oscilloscope/535052"]On the KC705 pins 1-2 of JP29 & JP30 needs to be connected for Ethernet to work. [/quote] Thanks for letting me know. This didn't even cross my mind to ask you, sorry. Best regards, Iulia ..read more

Lulia -Thanks for the response, got things to work... Used the hdl_2022_r2 HDL branch and the 2022_R2 ADI Linux branch. Upgraded libiio, and iio-oscilloscope to Ver 0.25. Connected via the IP context. On the KC705 pins 1-2 of JP29 & JP30 needs to be connected for Ethernet to work ..read more

Hi, We have only Linux support for this: https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9695.dts and here is the driver https://github.com/analogdevicesinc/linux/blob/main/drivers/iio/adc/ad9208.c#L42 Best regards, Iulia ..read more

I make the ad9695_fmc project in HD-MAIN for ZCU102. & now I need C codes to set up ZYNQ ARM core and program AD9695 in bare metal. How to start this HDL project without ZYNQ ARM codes? There is no project for AD9695 in the NO-OS MAIN folder ..read more

Hi lulia , We did multiplied by 4 and it didn't work . Best regards, Grace ..read more

Thanks for your replay Following your advices now I can see the correct input for ad9361 interface without zeros between data. I drove the upack as you said in the previous message Thanks for the support ..read more

Hi, the mainland testbench repo is https://github.com/analogdevicesinc/testbenches/ and need to be cloned inside the HDL repo as described in the Readme . Let me know if you followed these steps and attach any relevant log file. Just tested the tb with Vivado 2023.2. `make MODE=gui` allows to run the tb in gui mode ..read more

Hi, Thanks for the quick response, I think I am able to follow you. But if you can provide more clarity I would really appreciate it. I am using fmcomms2+zed board reference design https://github.com/analogdevicesinc/hdl/tree/main/projects/fmcomms2/zed as provided by above link. I have tried to attach the testbench too as provided on https://github.com/ronagyl/testbenches/tree/main/fmcomms2 but was not able to do so, for some unknown reasons. Would really appreciate support from you. Thanks & Regards ..read more