Forum Post: RE: AD9361 TDD help please.
Analog Devices, Inc. - FPGA Reference Designs
by IonutP
13h ago
Hi, This is because the TDD driver has changed and the devicetree was not updated to reflect the latest driver changes. The profile-config attribute was removed from the driver. Here is the commit that replaced profile_config : iio: cf_axi_tdd: Replace profile_config ยท analogdevicesinc/linux@f799193 (github.com) You will have to assign the values from the profile_config to the iio attributes as they were listed in the driver: profile[0] -> ADI_REG_TDD_COUNTER_2 profile[1] -> ADI_REG_TDD_FRAME_LENGTH profile[2] -> ADI_REG_TDD_SYNC_TERM_TYPE profile[3] -> ADI_REG_TDD_VCO_RX_ON_1 prof ..read more
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Forum Post: RE: Getting PCIe up and running with EVAL-TPG-ZYNQ3
Analog Devices, Inc. - FPGA Reference Designs
by JMarques
17h ago
Also, this content might be useful for you: https://www.analog.com/en/resources/technical-articles/simple-baseband-processor-for-rf-transceivers.html https://wiki.analog.com/resources/fpga/docs/hdl/xcomm2ip It's a tutorial on how to implement a custom BBP for the fmcomms2/zc706 (AD9081), where the IP xcomm 2ip is placed between the cpack/upack and the axi_ad9031 (rx/tx_ad9371_tpl_core in your case) to allow multiplexing the data source from software; in your case, multiplex between the DMAs connected to the PS (passing through the cpack/upacks) to the data source incoming from the PCIe ..read more
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Forum Post: RE: Send IQ Samples from PL or HDL Directly
Analog Devices, Inc. - FPGA Reference Designs
by JMarques
17h ago
Hi, this content might be useful for you https://www.analog.com/en/resources/technical-articles/simple-baseband-processor-for-rf-transceivers.html https://wiki.analog.com/resources/fpga/docs/hdl/xcomm2ip It's a tutorial on how to implement a BBP that allows multiplexing between the cpack/upack data to a custom source (your IP) from software. Note that in this implementation the custom IP is added in parallel to the cpack/upack and multiplexed, and in my original suggestion was to add it "before" to the cpack/upack ..read more
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Forum Post: Unable to communicate using SPI while connecting AD9684 with ZCU102 via FMC-HPC
Analog Devices, Inc. - FPGA Reference Designs
by sandhyaa
1d ago
Hi, I am unable to read from the registers of the AD9684 using SPI when connecting it to the ZCU102 Xilinx FPGA.The values read FF irrespective of what I pass in as an input to the SPI driver. I need this to test and configure the board before attempting data transfer. Here is a step-by-step description of what I have implemented till now- First, I modified the HDL source design of AD9656_fmc, which uses ZCU102 from the analog devices Github- https://github.com/analogdevicesinc/hdl/tree/hdl_2021_r1/projects/ad9656_fmc/zcu102 . I also used the design from the AD9467 to modify the design to a si ..read more
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Forum Post: RE: Getting PCIe up and running with EVAL-TPG-ZYNQ3
Analog Devices, Inc. - FPGA Reference Designs
by JMarques
2d ago
Hi, the source files don't update automatically, but there are few steps to update them more easily: During modification of the block design in the Vivado GUI, everything done in the GUI is translated to a tcl command that is logged to the Tcl Console. You can copy the commands and include mostly to projects/adrv9371x/common/adrv9371x_bd.tcl with carrier-specific code at projects/adrv9371x/common/adrv9371x_bd.tcl . Alternatively, you can use File > Export Block Design and copy the relevant tcl sections from the generated system.tcl to the files mentioned earlier, but the output is particula ..read more
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Forum Post: RE: Issues while trying to write/read using DMA to/from PS DDR
Analog Devices, Inc. - FPGA Reference Designs
by JMarques
2d ago
First, let's discard the previous error samples_pps ERROR: No such device (19) on cf-ad9361-lpc It looks like the PS is failing to "probe" samples_pps, if we actually dive into the source code, no such device (19) is ENODEV here and is caused when field [8] PPS_RECEIVER_ENABLE of register ADI_REG_CONFIG is low. Since it is a RO register, let's see why is is instantiate with this value, and indeed, the axi_ad9361 ip core has Pps receiver enable set to 0, so that isn't the problem then. Ok, now let's proceed, > On checking with iio_readdev command , it shows timing error The PS is not registe ..read more
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Forum Post: RE: Issues while trying to write/read using DMA to/from PS DDR
Analog Devices, Inc. - FPGA Reference Designs
by kernel537
2d ago
Hi, On checking with iio_readdev command , it shows timing error. But While running dmesg, we could'nt find any "time out error" . We've checked the axi_ad9361_adc_dma/irq using ILA . Initially, the irq is in low state, When we start capturing by IIO oscilloscope , the irq goes high . >Does the sys_id IP have any role in the design ? > Is there any additional port connections required ? and also please verify the ip configuration ..read more
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Forum Post: RE: Issues while trying to write/read using DMA to/from PS DDR
Analog Devices, Inc. - FPGA Reference Designs
by kernel537
2d ago
Hi, On checking with iio_readdev command , it shows timing error. But While running dmesg, we could'nt find any "time out error" . We've checked the axi_ad9361_adc_dma/irq using ILA . Initially, the irq is in low state, When we start capturing through IIO oscilloscope , the irq goes high . Does the sys_id IP have any role in the design ..read more
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Forum Post: RE: Issues while trying to write/read using DMA to/from PS DDR
Analog Devices, Inc. - FPGA Reference Designs
by kernel537
2d ago
Hi, Is there any additional port connections required ? and also please verify the ip configuration ..read more
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Forum Post: RE: AD9361 TDD help please.
Analog Devices, Inc. - FPGA Reference Designs
by TimHowe
2d ago
To clarify: The function of the TDD IP and the list of timing points that comprise a 'profile' are hopefully sufficiently documented. To me the lack of clarity is what other setup of the 936x is required and I would expect this to go through the ad9361 driver. On another point: I have the 2 example TDD profiles (master and slave) defined in devicetree but there is no such device /sys/bus/iio/devices/iio:deviceX/ profile_config Does this mean that the profiles have not been recognised or has the driver changed ..read more
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